{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T17:15:11Z","timestamp":1725470111571},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,5]]},"DOI":"10.1109\/rsp.2011.5929978","type":"proceedings-article","created":{"date-parts":[[2011,6,28]],"date-time":"2011-06-28T16:51:29Z","timestamp":1309279889000},"page":"74-78","source":"Crossref","is-referenced-by-count":1,"title":["Validation of channel decoding ASIPs a case study"],"prefix":"10.1109","author":[{"given":"Christian","family":"Brehm","sequence":"first","affiliation":[]},{"given":"Norbert","family":"Wehn","sequence":"additional","affiliation":[]},{"given":"Sacha","family":"Loitz","sequence":"additional","affiliation":[]},{"given":"Wolfgang","family":"Kunz","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1007\/978-90-481-3485-4_2"},{"year":"2010","key":"ref11","article-title":"Synopsys Processor Designer"},{"year":"0","key":"ref12","article-title":"Target Compiler Technologies"},{"year":"0","key":"ref13","article-title":"Tensilica Inc."},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2002428"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/SASP.2008.4570785"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1049\/ic.2010.0125"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2001.968726"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2009.5118298"},{"key":"ref3","article-title":"Algorithm-Architecture Co-Design of a Multi-Standard FEC Decoder ASIP","author":"bougard","year":"2008","journal-title":"ICT-MobileSummit 2008 Conference Proceedings"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2003164"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/SIPS.2008.4671733"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/RSP.2008.16"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TURBOCODING.2008.4658677"},{"key":"ref2","article-title":"Silicon-efficient dsps and digital architecture for lte base-band","author":"rowen","year":"2010","journal-title":"10th International Forum on Embedded MPSoC and Multicore"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"89","DOI":"10.1145\/1150019.1136494","article-title":"SODA: A Low-power Architecture For Software Radio","author":"lin","year":"2006","journal-title":"Proceedings of the 33rd Annual International Symposium on Computer Architecture ISCA '06"},{"key":"ref9","first-page":"43","article-title":"A Rapid Prototyping Environment for ASIP Validation in Wireless Systems","author":"alles","year":"2009","journal-title":"Proc EdaWorkshop 09"}],"event":{"name":"2011 22nd IEEE International Symposium on Rapid System Prototyping (RSP)","start":{"date-parts":[[2011,5,24]]},"location":"Karlsruhe, Germany","end":{"date-parts":[[2011,5,27]]}},"container-title":["2011 22nd IEEE International Symposium on Rapid System Prototyping"],"original-title":[],"link":[{"URL":"https:\/\/linproxy.fan.workers.dev:443\/http\/xplorestaging.ieee.org\/ielx5\/5888815\/5929963\/05929978.pdf?arnumber=5929978","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T22:30:07Z","timestamp":1497911407000},"score":1,"resource":{"primary":{"URL":"https:\/\/linproxy.fan.workers.dev:443\/http\/ieeexplore.ieee.org\/document\/5929978\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,5]]},"references-count":17,"URL":"https:\/\/linproxy.fan.workers.dev:443\/https\/doi.org\/10.1109\/rsp.2011.5929978","relation":{},"subject":[],"published":{"date-parts":[[2011,5]]}}}