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ORCIDITC-Asia 2025: Tokyo, Japan
- IEEE International Test Conference in Asia, ITC-Asia 2025, Tokyo, Japan, December 16-19, 2025. IEEE 2025, ISBN 979-8-3315-7193-1
- Ashish Reddy Bommana, Anshuman Chandra, Moiz Khan:
Descriptive Language For 3D IC Die-to-Die Interconnect Repair For IEEE P3405 Standard. 1-6 - Zhongyuan Liang, Huaguo Liang, Weikun Chen, Xianrui Dou:
A High-Precision Pre-Bond TSV Delay-Fault Detection Technique Using Digitally Controlled Delay Lines. 7-12 - Norio Kobayashi, Minoru Iida, Masayuki Nakamura, Hideki Shirasu:
A mm-Wave Frontend Circuit with High Accuracy Power Levels for ATE to Test 76- to 81- GHz Radar IC. 13-18 - Rinika Paul:
A Kelvin Connection-Based Approach Using an Internal DFT Technique To Compensate Resistance Variability In Semiconductor Testing. 19-24 - Wei-Ji Chao, Tsung-Chun Chen, Chu-Cheng Chen, Tong-Yu Hsieh:
Monitor-Like Efficiency with Detector-Level Accuracy: Frontier-Aligned Timing Monitor for AI Accelerators. 25-30 - Yangxinzi Zhou, Wenfa Zhan, Jiangyun Zheng, Xueyuan Cai, Shiyu Zhao:
A Fast Nonlinear Trimming Method Driven by Performance Deviation. 31-36 - Po-Chieh Yen, Wei-Shen Wang, Shao-Yu Wu, Bing-Chen Li, James Chien-Mo Li, Norman Chang, Ying-Shiun Li, Lang Lin, Akhilesh Kumar:
Automatic IR-Informed Timing and Timing-Aware IR Optimization. 37-42 - Haotian Zhang, Shurong Cao, Ningmu Zou:
FALCO-WAFER: Feature-Aware Lightweight Contextual Detector for Wafer Defect Detection. 43-47 - Dong Xiang, Wenfei Wang, Can Xiang:
Design for Testability for VLSI Circuits with A Large Number of Unknown Test Response Sources. 48-53 - Cynthia Kuan, Cheng-Yun Hsieh, Shan-Chi Shih, James Chien-Mo Li:
Fault-Detecting Randomized Benchmarking for Testing Quantum Processors. 54-59 - Brojogopal Sapui, Mahboobe Sadeghipourrudsari, Mehdi B. Tahoori:
Collide & Conquer: Side-channel Attack on Hyper-dimensional Computing (HDC) Accelerators. 60-65 - Wu-Tung Cheng, Szczepan Urban, Manish Sharma, Jakub Janicki:
Improving Effect-Cause Diagnosis Performance with Minimal Memory Overhead on Asymmetric Partition Trees (APT). 66-71 - Alessandro Ciullo, Stephan Eggersglüß, Daniel Tille, Andreas Glowatz, Giusy Iaria, Paolo Bernardi:
Exploiting weak detections for optimizing pattern generation in Defect-Oriented Cell-Aware ATPG. 72-77 - Peter Wohl, John A. Waicukauski, Jonathon E. Colburn, Yasunari Kanzawa:
Improving ATPG through Abort-Driven Dynamic Learning (ADDLe). 78-83 - Takuya Kishimoto, Hiroyuki Yotsuyanagi:
Test Point Insertion for an Approximate Multiplier Using Enhanced Static Segment Method to Reduce Test Patterns and Overdetection. 84-89 - Yun-Chieh Wang, Chun-Teng Chao, Shi-Yu Huang, Chi-Kang Chen:
A Speed Learning Scheme To Mitigate The Silent Data Corruption in a Multi-Core Design. 90-95 - Hao-Yang Chi, Chih-Tsun Huang, Jing-Jia Liou, Harry H. Chen:
Fault Injection and Tolerance Analysis of Battery Management Systems Using SystemC-AMS. 96-101 - Hideyuki Ichihara, Kota Okahara, Tomoo Inoue:
Analysis and Improvement of Parallel Implementation of Linear FSMs for High-Speed Stochastic Computing. 102-107 - Rama Mounika Kodamanchili, Natalia Cherezova, Mahdi Taheri, Maksim Jenihhin:
Adaptive Fault Resilience for Early-Exit DNNs. 108-113
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