<?xml version="1.0"?>
<dblpperson name="Kuo-Liang Cheng" pid="00/5558" n="19">
<person key="homepages/00/5558" mdate="2009-06-10">
<author pid="00/5558">Kuo-Liang Cheng</author>
</person>
<r><article key="journals/tcad/YehCCW07" mdate="2023-09-30">
<author pid="17/1338">Jen-Chieh Yeh</author>
<author pid="00/5558">Kuo-Liang Cheng</author>
<author pid="33/7043">Yung-Fa Chou</author>
<author orcid="0000-0001-8614-7908" pid="74/1000">Cheng-Wen Wu</author>
<title>Flash Memory Testing and Built-In Self-Diagnosis With March-Like Test Algorithms.</title>
<pages>1101-1113</pages>
<year>2007</year>
<volume>26</volume>
<journal>IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.</journal>
<number>6</number>
<ee>https://doi.org/10.1109/TCAD.2006.885828</ee>
<url>db/journals/tcad/tcad26.html#YehCCW07</url>
</article>
</r>
<r><article key="journals/tvlsi/LoWCHWWW07" mdate="2023-09-30">
<author pid="56/4104">Chih-Yen Lo</author>
<author pid="23/967">Chen-Hsing Wang</author>
<author pid="00/5558">Kuo-Liang Cheng</author>
<author pid="35/6008">Jing-Reng Huang</author>
<author pid="04/1252">Chih-Wea Wang</author>
<author pid="79/361">Shin-Moe Wang</author>
<author orcid="0000-0001-8614-7908" pid="74/1000">Cheng-Wen Wu</author>
<title>STEAC: A Platform for Automatic SOC Test Integration.</title>
<pages>541-545</pages>
<year>2007</year>
<volume>15</volume>
<journal>IEEE Trans. Very Large Scale Integr. Syst.</journal>
<number>5</number>
<ee>https://doi.org/10.1109/TVLSI.2007.893662</ee>
<url>db/journals/tvlsi/tvlsi15.html#LoWCHWWW07</url>
</article>
</r>
<r><inproceedings key="conf/aspdac/SuWCHW05" mdate="2023-09-30">
<author pid="33/3734">Chih-Pin Su</author>
<author pid="23/967">Chen-Hsing Wang</author>
<author pid="00/5558">Kuo-Liang Cheng</author>
<author pid="34/3633">Chih-Tsun Huang</author>
<author orcid="0000-0001-8614-7908" pid="74/1000">Cheng-Wen Wu</author>
<title>Design and test of a scalable security processor.</title>
<pages>372-375</pages>
<year>2005</year>
<crossref>conf/aspdac/2005</crossref>
<booktitle>ASP-DAC</booktitle>
<ee>https://doi.org/10.1145/1120725.1120872</ee>
<ee>https://doi.org/10.1109/ASPDAC.2005.1466191</ee>
<url>db/conf/aspdac/aspdac2005.html#SuWCHW05</url>
</inproceedings>
</r>
<r><inproceedings key="conf/itc/ChengHWLDHHL04" mdate="2023-03-23">
<author pid="00/5558">Kuo-Liang Cheng</author>
<author pid="35/6008">Jing-Reng Huang</author>
<author pid="04/1252">Chih-Wea Wang</author>
<author pid="56/4104">Chih-Yen Lo</author>
<author pid="14/476">Li-Ming Denq</author>
<author pid="34/3633">Chih-Tsun Huang</author>
<author pid="75/896">Shin-Wei Hung</author>
<author pid="54/5043">Jye-Yuan Lee</author>
<title>An SOC Test Integration Platform and Its Industrial Realization.</title>
<pages>1213-1222</pages>
<year>2004</year>
<crossref>conf/itc/2004</crossref>
<booktitle>ITC</booktitle>
<ee>https://doi.org/10.1109/TEST.2004.1387394</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/ITC.2004.31</ee>
<url>db/conf/itc/itc2004.html#ChengHWLDHHL04</url>
</inproceedings>
</r>
<r><inproceedings key="conf/iccad/ChengWLCHW03" mdate="2023-03-24">
<author pid="00/5558">Kuo-Liang Cheng</author>
<author pid="04/1252">Chih-Wea Wang</author>
<author pid="33/5495">Jih-Nung Lee</author>
<author pid="33/7043">Yung-Fa Chou</author>
<author pid="34/3633">Chih-Tsun Huang</author>
<author pid="74/1000">Cheng-Wen Wu</author>
<title>FAME: A Fault-Pattern Based Memory Failure Analysis Framework.</title>
<pages>595-598</pages>
<year>2003</year>
<crossref>conf/iccad/2003</crossref>
<booktitle>ICCAD</booktitle>
<ee>https://doi.ieeecomputersociety.org/10.1109/ICCAD.2003.1257871</ee>
<ee>https://dl.acm.org/citation.cfm?id=1009950</ee>
<url>db/conf/iccad/iccad2003.html#ChengWLCHW03</url>
</inproceedings>
</r>
<r><inproceedings key="conf/itc/WangCLCHWHY03" mdate="2023-03-23">
<author pid="04/1252">Chih-Wea Wang</author>
<author pid="00/5558">Kuo-Liang Cheng</author>
<author pid="33/5495">Jih-Nung Lee</author>
<author pid="33/7043">Yung-Fa Chou</author>
<author pid="34/3633">Chih-Tsun Huang</author>
<author pid="74/1000">Cheng-Wen Wu</author>
<author pid="71/4185">Frank Huang</author>
<author pid="58/6505">Hong-Tzer Yang</author>
<title>Fault Pattern Oriented Defect Diagnosis for Memories.</title>
<pages>29-38</pages>
<year>2003</year>
<crossref>conf/itc/2003</crossref>
<booktitle>ITC</booktitle>
<ee>https://doi.org/10.1109/TEST.2003.1270822</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/TEST.2003.1270822</ee>
<url>db/conf/itc/itc2003.html#WangCLCHWHY03</url>
</inproceedings>
</r>
<r><inproceedings key="conf/vts/WangCHW03" mdate="2023-09-30">
<author pid="04/1252">Chih-Wea Wang</author>
<author pid="00/5558">Kuo-Liang Cheng</author>
<author pid="34/3633">Chih-Tsun Huang</author>
<author orcid="0000-0001-8614-7908" pid="74/1000">Cheng-Wen Wu</author>
<title>Test and Diagnosis of Word-Oriented Multiport Memories.</title>
<pages>248-253</pages>
<year>2003</year>
<crossref>conf/vts/2003</crossref>
<booktitle>VTS</booktitle>
<ee>https://doi.org/10.1109/VTEST.2003.1197658</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/VTEST.2003.1197658</ee>
<url>db/conf/vts/vts2003.html#WangCHW03</url>
</inproceedings>
</r>
<r><article key="journals/tcad/WuHCW02" mdate="2023-09-30">
<author pid="71/5806">Chi-Feng Wu</author>
<author pid="34/3633">Chih-Tsun Huang</author>
<author pid="00/5558">Kuo-Liang Cheng</author>
<author orcid="0000-0001-8614-7908" pid="74/1000">Cheng-Wen Wu</author>
<title>Fault simulation and test algorithm generation for random accessmemories.</title>
<pages>480-490</pages>
<year>2002</year>
<volume>21</volume>
<journal>IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.</journal>
<number>4</number>
<ee>https://doi.org/10.1109/43.992771</ee>
<url>db/journals/tcad/tcad21.html#WuHCW02</url>
</article>
</r>
<r><article key="journals/tcad/ChengTW02" mdate="2023-09-30">
<author pid="00/5558">Kuo-Liang Cheng</author>
<author pid="10/6408">Ming-Fu Tsai</author>
<author orcid="0000-0001-8614-7908" pid="74/1000">Cheng-Wen Wu</author>
<title>Neighborhood pattern-sensitive fault testing and diagnostics for random-access memories.</title>
<pages>1328-1336</pages>
<year>2002</year>
<volume>21</volume>
<journal>IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.</journal>
<number>11</number>
<ee>https://doi.org/10.1109/TCAD.2002.804101</ee>
<url>db/journals/tcad/tcad21.html#ChengTW02</url>
</article>
</r>
<r><inproceedings key="conf/ats/WangHLCHWL02" mdate="2023-09-30">
<author pid="04/1252">Chih-Wea Wang</author>
<author pid="35/6008">Jing-Reng Huang</author>
<author pid="21/977">Yen-Fu Lin</author>
<author pid="00/5558">Kuo-Liang Cheng</author>
<author pid="34/3633">Chih-Tsun Huang</author>
<author orcid="0000-0001-8614-7908" pid="74/1000">Cheng-Wen Wu</author>
<author pid="65/1027">Youn-Long Lin</author>
<title>Test Scheduling of BISTed Memory Cores for SOC.</title>
<pages>356-</pages>
<year>2002</year>
<crossref>conf/ats/2002</crossref>
<booktitle>Asian Test Symposium</booktitle>
<ee>https://doi.org/10.1109/ATS.2002.1181737</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/ATS.2002.1181737</ee>
<url>db/conf/ats/ats2002.html#WangHLCHWL02</url>
</inproceedings>
</r>
<r><inproceedings key="conf/ats/HsuHCWHWL02" mdate="2023-09-30">
<author pid="76/2252">Huan-Shan Hsu</author>
<author pid="35/6008">Jing-Reng Huang</author>
<author pid="00/5558">Kuo-Liang Cheng</author>
<author pid="04/1252">Chih-Wea Wang</author>
<author pid="34/3633">Chih-Tsun Huang</author>
<author orcid="0000-0001-8614-7908" pid="74/1000">Cheng-Wen Wu</author>
<author pid="65/1027">Youn-Long Lin</author>
<title>Test Scheduling and Test Access Architecture Optimization for System-on-Chip.</title>
<pages>411-</pages>
<year>2002</year>
<crossref>conf/ats/2002</crossref>
<booktitle>Asian Test Symposium</booktitle>
<ee>https://doi.org/10.1109/ATS.2002.1181746</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/ATS.2002.1181746</ee>
<url>db/conf/ats/ats2002.html#HsuHCWHWL02</url>
</inproceedings>
</r>
<r><inproceedings key="conf/delta/YehWCCHW02" mdate="2023-09-30">
<author pid="17/1338">Jen-Chieh Yeh</author>
<author pid="71/5806">Chi-Feng Wu</author>
<author pid="00/5558">Kuo-Liang Cheng</author>
<author pid="33/7043">Yung-Fa Chou</author>
<author pid="34/3633">Chih-Tsun Huang</author>
<author orcid="0000-0001-8614-7908" pid="74/1000">Cheng-Wen Wu</author>
<title>Flash Memory Built-In Self-Test Using March-Like Algorithm.</title>
<pages>137-141</pages>
<year>2002</year>
<crossref>conf/delta/2002</crossref>
<booktitle>DELTA</booktitle>
<ee>https://doi.org/10.1109/DELTA.2002.994602</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/DELTA.2002.994602</ee>
<url>db/conf/delta/delta2002.html#YehWCCHW02</url>
</inproceedings>
</r>
<r><inproceedings key="conf/vts/ChengYWHW02" mdate="2023-09-30">
<author pid="00/5558">Kuo-Liang Cheng</author>
<author pid="17/1338">Jen-Chieh Yeh</author>
<author pid="04/1252">Chih-Wea Wang</author>
<author pid="34/3633">Chih-Tsun Huang</author>
<author orcid="0000-0001-8614-7908" pid="74/1000">Cheng-Wen Wu</author>
<title>RAMSES-FT: A Fault Simulator for Flash Memory Testing and Diagnostics.</title>
<pages>281-288</pages>
<year>2002</year>
<crossref>conf/vts/2002</crossref>
<booktitle>VTS</booktitle>
<ee>https://doi.org/10.1109/VTS.2002.1011153</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/VTS.2002.1011153</ee>
<url>db/conf/vts/vts2002.html#ChengYWHW02</url>
</inproceedings>
</r>
<r><inproceedings key="conf/ats/ChengHHYHW01" mdate="2023-03-24">
<author pid="00/5558">Kuo-Liang Cheng</author>
<author pid="67/724">Chia-Ming Hsueh</author>
<author pid="35/6008">Jing-Reng Huang</author>
<author pid="17/1338">Jen-Chieh Yeh</author>
<author pid="34/3633">Chih-Tsun Huang</author>
<author pid="74/1000">Cheng-Wen Wu</author>
<title>Automatic Generation of Memory Built-in Self-Test Cores for System-on-Chip.</title>
<pages>91-96</pages>
<year>2001</year>
<crossref>conf/ats/2001</crossref>
<booktitle>Asian Test Symposium</booktitle>
<ee>https://doi.org/10.1109/ATS.2001.990265</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/ATS.2001.990265</ee>
<url>db/conf/ats/ats2001.html#ChengHHYHW01</url>
</inproceedings>
</r>
<r><inproceedings key="conf/dac/WuHCWW01" mdate="2023-09-30">
<author pid="71/5806">Chi-Feng Wu</author>
<author pid="34/3633">Chih-Tsun Huang</author>
<author pid="00/5558">Kuo-Liang Cheng</author>
<author pid="04/1252">Chih-Wea Wang</author>
<author orcid="0000-0001-8614-7908" pid="74/1000">Cheng-Wen Wu</author>
<title>Simulation-Based Test Algorithm Generation and Port Scheduling for Multi-Port Memories.</title>
<pages>301-306</pages>
<year>2001</year>
<crossref>conf/dac/2001</crossref>
<booktitle>DAC</booktitle>
<ee>https://doi.org/10.1145/378239.378491</ee>
<url>db/conf/dac/dac2001.html#WuHCWW01</url>
</inproceedings>
</r>
<r><inproceedings key="conf/itc/LiCHW01" mdate="2023-10-17">
<author pid="158/8925">Jin-Fu Li 0001</author>
<author pid="00/5558">Kuo-Liang Cheng</author>
<author pid="34/3633">Chih-Tsun Huang</author>
<author pid="74/1000">Cheng-Wen Wu</author>
<title>March-based RAM diagnosis algorithms for stuck-at and coupling faults.</title>
<pages>758-767</pages>
<year>2001</year>
<crossref>conf/itc/2001</crossref>
<booktitle>ITC</booktitle>
<url>db/conf/itc/itc2001.html#LiCHW01</url>
<ee>https://doi.org/10.1109/TEST.2001.966697</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/TEST.2001.966697</ee>
</inproceedings>
</r>
<r><inproceedings key="conf/vts/ChengTW01" mdate="2023-03-24">
<author pid="00/5558">Kuo-Liang Cheng</author>
<author pid="10/6408">Ming-Fu Tsai</author>
<author pid="74/1000">Cheng-Wen Wu</author>
<title>Efficient Neighborhood Pattern-Sensitive Fault Test Algorithms for Semiconductor Memories.</title>
<pages>225-230</pages>
<year>2001</year>
<crossref>conf/vts/2001</crossref>
<booktitle>VTS</booktitle>
<ee>https://doi.org/10.1109/VTS.2001.923443</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/VTS.2001.923443</ee>
<url>db/conf/vts/vts2001.html#ChengTW01</url>
</inproceedings>
</r>
<r><inproceedings key="conf/iccad/WuHWCW00" mdate="2023-09-30">
<author pid="71/5806">Chi-Feng Wu</author>
<author pid="34/3633">Chih-Tsun Huang</author>
<author pid="04/1252">Chih-Wea Wang</author>
<author pid="00/5558">Kuo-Liang Cheng</author>
<author orcid="0000-0001-8614-7908" pid="74/1000">Cheng-Wen Wu</author>
<title>Error Catch and Analysis for Semiconductor Memories Using March Tests.</title>
<pages>468-471</pages>
<year>2000</year>
<crossref>conf/iccad/2000</crossref>
<booktitle>ICCAD</booktitle>
<url>db/conf/iccad/iccad2000.html#WuHWCW00</url>
<ee>https://doi.org/10.1109/ICCAD.2000.896516</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/ICCAD.2000.896516</ee>
<ee>http://dl.acm.org/citation.cfm?id=603007</ee>
</inproceedings>
</r>
<r><inproceedings key="conf/vts/WuHCW00" mdate="2023-03-24">
<author pid="71/5806">Chi-Feng Wu</author>
<author pid="34/3633">Chih-Tsun Huang</author>
<author pid="00/5558">Kuo-Liang Cheng</author>
<author pid="74/1000">Cheng-Wen Wu</author>
<title>Simulation-Based Test Algorithm Generation for Random Access Memories.</title>
<pages>291-296</pages>
<year>2000</year>
<crossref>conf/vts/2000</crossref>
<booktitle>VTS</booktitle>
<ee>https://doi.org/10.1109/VTEST.2000.843857</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/VTEST.2000.843857</ee>
<url>db/conf/vts/vts2000.html#WuHCW00</url>
</inproceedings>
</r>
<coauthors n="23" nc="1">
<co c="0"><na f="c/Chou:Yung=Fa" pid="33/7043">Yung-Fa Chou</na></co>
<co c="0"><na f="d/Denq:Li=Ming" pid="14/476">Li-Ming Denq</na></co>
<co c="0"><na f="h/Hsu:Huan=Shan" pid="76/2252">Huan-Shan Hsu</na></co>
<co c="0"><na f="h/Hsueh:Chia=Ming" pid="67/724">Chia-Ming Hsueh</na></co>
<co c="0"><na f="h/Huang:Chih=Tsun" pid="34/3633">Chih-Tsun Huang</na></co>
<co c="0"><na f="h/Huang:Frank" pid="71/4185">Frank Huang</na></co>
<co c="0"><na f="h/Huang:Jing=Reng" pid="35/6008">Jing-Reng Huang</na></co>
<co c="0"><na f="h/Hung:Shin=Wei" pid="75/896">Shin-Wei Hung</na></co>
<co c="0"><na f="l/Lee:Jih=Nung" pid="33/5495">Jih-Nung Lee</na></co>
<co c="0"><na f="l/Lee:Jye=Yuan" pid="54/5043">Jye-Yuan Lee</na></co>
<co c="0"><na f="l/Li_0001:Jin=Fu" pid="158/8925">Jin-Fu Li 0001</na></co>
<co c="0"><na f="l/Lin:Yen=Fu" pid="21/977">Yen-Fu Lin</na></co>
<co c="0"><na f="l/Lin:Youn=Long" pid="65/1027">Youn-Long Lin</na></co>
<co c="0"><na f="l/Lo:Chih=Yen" pid="56/4104">Chih-Yen Lo</na></co>
<co c="0"><na f="s/Su:Chih=Pin" pid="33/3734">Chih-Pin Su</na></co>
<co c="0"><na f="t/Tsai:Ming=Fu" pid="10/6408">Ming-Fu Tsai</na></co>
<co c="0"><na f="w/Wang:Chen=Hsing" pid="23/967">Chen-Hsing Wang</na></co>
<co c="0"><na f="w/Wang:Chih=Wea" pid="04/1252">Chih-Wea Wang</na></co>
<co c="0"><na f="w/Wang:Shin=Moe" pid="79/361">Shin-Moe Wang</na></co>
<co c="0"><na f="w/Wu:Cheng=Wen" pid="74/1000">Cheng-Wen Wu</na></co>
<co c="0"><na f="w/Wu:Chi=Feng" pid="71/5806">Chi-Feng Wu</na></co>
<co c="0"><na f="y/Yang:Hong=Tzer" pid="58/6505">Hong-Tzer Yang</na></co>
<co c="0"><na f="y/Yeh:Jen=Chieh" pid="17/1338">Jen-Chieh Yeh</na></co>
</coauthors>
</dblpperson>

