Statistical Timing Analysis considering Multiple-Input Switching.

Chaitanya Peddawad Debjit Sinha Vasant Rao Chaitanya Peddawad Michael H. Wood Jeffrey G. Hemmett Suriya Skariah Patrick Williams Statistical Timing Analysis considering Multiple-Input Switching. 1-6 2020 DAC https://doi.org/10.1109/DAC18072.2020.9218601 conf/dac/2020 db/conf/dac/dac2020.html#SinhaRPWHSW20 Chaitanya Peddawad Aman Goel B. Dheeraj Nitin Chandrachoodan iitRACE: A Memory Efficient Engine for Fast Incremental Timing Analysis and Clock Pessimism Removal. 903-909 2015 ICCAD https://doi.org/10.1109/ICCAD.2015.7372667 http://dl.acm.org/citation.cfm?id=2840945 conf/iccad/2015 db/conf/iccad/iccad2015.html#PeddawadGDC15 Nitin Chandrachoodan B. Dheeraj Aman Goel Jeffrey G. Hemmett Vasant Rao Debjit Sinha Suriya Skariah Patrick Williams Michael H. Wood