Very Compact and Efficient 32-Bit AES Core Design Using FPGAs for Small-Footprint Low-Power Embedded Applications.

Fri, 01 Jan 2016 00:00:00 +0100

Raed Bani-Hani, Khaldoon Mhaidat , Salah S. Harb :
Very Compact and Efficient 32-Bit AES Core Design Using FPGAs for Small-Footprint Low-Power Embedded Applications. J. Circuits Syst. Comput. 25(7): 1650080:1-1650080:17 (2016)