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2020 – today
- 2026
[j3]Han Yang
, Yufei Jin, Aojun Jiang, Xinrui Wang, Xibu Wang, Xiaoling Yi, Yu Sun, Zhuoran Zhang:
Fine-Grained Classification for Depth Estimation From Monocular Microscopy for Robotic Micromanipulation of Motile Cells. IEEE Robotics Autom. Lett. 11(1): 250-257 (2026)- [j2]Jiacong Sun, Xiaoling Yi, Arne Symons, Georges G. E. Gielen, Lieven Eeckhout, Marian Verhelst:
An Analytical Model for Performance-Carbon Co-Optimization of Edge AI Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 45(3): 1499-1503 (2026) - [c13]Stef Cuyckens, Xiaoling Yi, Robin Geens, Joren Dumoulin, Martin Wiesner, Chao Fang, Marian Verhelst:
Precision-Scalable Microscaling Datapaths with Optimized Reduction Tree for Efficient NPU Integration. ASP-DAC 2026: 611-617 - [c12]Josse Van Delm, Anton Lydike, Joren Dumoulin, Jonas Crols, Xiaoling Yi, Ryan Antonio, Jackson Woodruff, Tobias Grosser, Marian Verhelst:
The Configuration Wall: Characterization and Elimination of Accelerator Configuration Overhead. ASPLOS (1) 2026: 265-280 - [i9]Xiaoling Yi, Ryan Antonio, Yunhao Deng, Fanchen Kong, Joren Dumoulin, Jun Yin, Marian Verhelst:
A 16 nm 1.60TOPS/W High Utilization DNN Accelerator with 3D Spatial Data Reuse and Efficient Shared Memory Access. CoRR abs/2602.11357 (2026) - 2025
- [j1]Zheng Wu, Jinyi Shen, Xiaoling Yi, Li Shang, Fan Yang, Xuan Zeng:
Prior-Boosted GRL: Microarchitecture Design Space Exploration via Graph Representation Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 44(3): 1141-1154 (2025) - [c11]Xiaoling Yi, Ryan Antonio, Joren Dumoulin, Jiacong Sun, Josse Van Delm, Guilherme Pereira Paim, Marian Verhelst:
OpenGeMM: A Highly-Efficient GeMM Accelerator Generator with Lightweight RISC-V Control and Tight Memory Coupling. ASP-DAC 2025: 1055-1061 - [c10]Xiaoling Yi, Yunhao Deng, Ryan Antonio, Fanchen Kong, Guilherme Paim, Marian Verhelst:
DataMaestro: A Versatile and Efficient Data Streaming Engine Bringing Decoupled Memory Access To Dataflow Accelerators. DAC 2025: 1-7 - [c9]Fanchen Kong, Yunhao Deng, Xiaoling Yi, Ryan Antonio, Marian Verhelst:
XDMA: A Distributed, Extensible DMA Architecture for Layout-Flexible Data Movements in Heterogeneous Multi-Accelerator SoCs. ICCD 2025: 690-693 - [c8]Ryan Antonio, Joren Dumoulin, Xiaoling Yi, Josse Van Delm, Yunhao Deng, Guilherme Paim, Marian Verhelst:
An Open-Source HW-SW Co-Development Framework Enabling Efficient Multi-Accelerator Systems. ISLPED 2025: 1-7 - [c7]Stef Cuyckens, Xiaoling Yi, Nitish Satya Murthy, Chao Fang, Marian Verhelst:
Efficient Precision-Scalable Hardware for Microscaling (MX) Processing in Robotics Learning. ISLPED 2025: 1-7 - [c6]Panagiotis Chaidos, Alexios Maras, Georgios Alexandris, Xiaoling Yi, Asmae El Arrassi, Bas Ahn, James D. Garside, Yunhao Deng, Theofilos Spyrou, Anteneh Gebregiorgis, Mottaqiallah Taouil, Manil Dev Gomony, Sotirios Xydis, Marian Verhelst, Said Hamdioui, Dimitrios Soudris, Henk Corporaal:
Flexible Hardware Accelerators for Ultra-Low Power Edge AI: The CONVOLVE Approach. ISVLSI 2025: 1-6 - [i8]Xiaoling Yi, Yunhao Deng, Ryan Antonio, Fanchen Kong, Guilherme Paim, Marian Verhelst:
DataMaestro: A Versatile and Efficient Data Streaming Engine Bringing Decoupled Memory Access To Dataflow Accelerators. CoRR abs/2504.14091 (2025) - [i7]Stef Cuyckens, Xiaoling Yi, Nitish Satya Murthy, Chao Fang, Marian Verhelst:
Efficient Precision-Scalable Hardware for Microscaling (MX) Processing in Robotics Learning. CoRR abs/2505.22404 (2025) - [i6]Fanchen Kong, Yunhao Deng, Xiaoling Yi, Ryan Antonio, Marian Verhelst:
XDMA: A Distributed, Extensible DMA Architecture for Layout-Flexible Data Movements in Heterogeneous Multi-Accelerator SoCs. CoRR abs/2508.08396 (2025) - [i5]Ryan Antonio, Joren Dumoulin, Xiaoling Yi, Josse Van Delm, Yunhao Deng, Guilherme Paim, Marian Verhelst:
An Open-Source HW-SW Co-Development Framework Enabling Efficient Multi-Accelerator Systems. CoRR abs/2508.14582 (2025) - [i4]Stef Cuyckens, Xiaoling Yi, Robin Geens, Joren Dumoulin, Martin Wiesner, Chao Fang, Marian Verhelst:
Precision-Scalable Microscaling Datapaths with Optimized Reduction Tree for Efficient NPU Integration. CoRR abs/2511.06313 (2025) - [i3]Josse Van Delm, Anton Lydike, Joren Dumoulin, Jonas Crols, Xiaoling Yi, Ryan Antonio, Jackson Woodruff, Tobias Grosser, Marian Verhelst:
The Configuration Wall: Characterization and Elimination of Accelerator Configuration Overhead. CoRR abs/2511.10397 (2025) - [i2]Yunhao Deng, Fanchen Kong, Xiaoling Yi, Ryan Antonio, Marian Verhelst:
Torrent: A Distributed DMA for Efficient and Flexible Point-to-Multipoint Data Movement. CoRR abs/2512.17589 (2025) - 2024
- [c5]Zheng Wu, Xiaoling Yi, Li Shang, Fan Yang:
SenseDSE: Sensitivity-Based Performance Evaluation for Design Space Exploration of Microarchitecture. DATE 2024: 1-6 - [i1]Xiaoling Yi, Ryan Antonio, Joren Dumoulin, Jiacong Sun, Josse Van Delm, Guilherme Paim, Marian Verhelst:
OpenGeMM: A High-Utilization GeMM Accelerator Generator with Lightweight RISC-V Control and Tight Memory Coupling. CoRR abs/2411.09543 (2024) - 2023
- [c4]Xiaoling Yi, Jialin Lu, Xiankui Xiong, Dong Xu, Li Shang, Fan Yang:
Graph Representation Learning for Microarchitecture Design Space Exploration. DAC 2023: 1-6 - [c3]Jiangnan Yu, Fan Yang, Xiaoling Yi, Chixiao Chen, Jun Tao, Dong Xu, Xiankui Xiong, Haitao Yang:
TPNoC: An Efficient Topology Reconfigurable NoC Generator. ACM Great Lakes Symposium on VLSI 2023: 77-82 - 2022
- [c2]Xiaoling Yi, Jiangnan Yu, Zheng Wu, Xiankui Xiong, Dong Xu, Chixiao Chen, Jun Tao, Fan Yang:
NNASIM: An Efficient Event-Driven Simulator for DNN Accelerators with Accurate Timing and Area Models. ISCAS 2022: 2806-2810 - [c1]Zheng Wu, Wuzhen Xie, Xiaoling Yi, Haitao Yang, Ruiyao Pu, Xiankui Xiong, Haidong Yao, Chixiao Chen, Jun Tao, Fan Yang:
An Automated Compiler for RISC-V Based DNN Accelerator. ISCAS 2022: 3097-3101
Coauthor Index
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