BibTeX records: Pi-Chen Hsiao

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@inproceedings{DBLP:conf/glvlsi/LinHLKLKLC10,
  author       = {Tay{-}Jyi Lin and
                  Pi{-}Chen Hsiao and
                  Chi{-}Hung Lin and
                  Shu{-}Chang Kuo and
                  Chou{-}Kun Lin and
                  Yu{-}Ting Kuo and
                  Chih{-}Wei Liu and
                  Yuan{-}Hua Chu},
  editor       = {R. Iris Bahar and
                  Fabrizio Lombardi and
                  David Atienza and
                  Erik Brunvand},
  title        = {Collaborative voltage scaling with online {STA} and variable-latency
                  datapath},
  booktitle    = {Proceedings of the 20th {ACM} Great Lakes Symposium on {VLSI} 2009,
                  Providence, Rhode Island, USA, May 16-18 2010},
  pages        = {347--352},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1785481.1785560},
  doi          = {10.1145/1785481.1785560},
  timestamp    = {Fri, 16 Jan 2026 12:32:22 +0100},
  biburl       = {https://dblp.org/rec/conf/glvlsi/LinHLKLKLC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/LinCKLH08,
  author       = {Tay{-}Jyi Lin and
                  Shin{-}Kai Chen and
                  Yu{-}Ting Kuo and
                  Chih{-}Wei Liu and
                  Pi{-}Chen Hsiao},
  title        = {Design and Implementation of a High-Performance and Complexity-Effective
                  {VLIW} {DSP} for Multimedia Applications},
  journal      = {J. Signal Process. Syst.},
  volume       = {51},
  number       = {3},
  pages        = {209--223},
  year         = {2008},
  url          = {https://doi.org/10.1007/s11265-007-0061-x},
  doi          = {10.1007/S11265-007-0061-X},
  timestamp    = {Thu, 12 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/vlsisp/LinCKLH08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/HsiaoLLJ07,
  author       = {Pi{-}Chen Hsiao and
                  Tay{-}Jyi Lin and
                  Chih{-}Wei Liu and
                  Chein{-}Wei Jen},
  title        = {Latency-Tolerant Virtual Cluster Architecture for {VLIW} {DSP}},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2007), 27-20
                  May 2007, New Orleans, Louisiana, {USA}},
  pages        = {3506--3509},
  publisher    = {{IEEE}},
  year         = {2007},
  url          = {https://doi.org/10.1109/ISCAS.2007.378438},
  doi          = {10.1109/ISCAS.2007.378438},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HsiaoLLJ07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/glvlsi/LinCLHCLLJ05,
  author       = {Tay{-}Jyi Lin and
                  Chie{-}Min Chao and
                  Chia{-}Hsien Liu and
                  Pi{-}Chen Hsiao and
                  Shin{-}Kai Chen and
                  Li{-}Chun Lin and
                  Chih{-}Wei Liu and
                  Chein{-}Wei Jen},
  editor       = {John C. Lach and
                  Gang Qu and
                  Yehea I. Ismail},
  title        = {A unified processor architecture for {RISC} {\&} {VLIW} {DSP}},
  booktitle    = {Proceedings of the 15th {ACM} Great Lakes Symposium on {VLSI} 2005,
                  Chicago, Illinois, USA, April 17-19, 2005},
  pages        = {50--55},
  publisher    = {{ACM}},
  year         = {2005},
  url          = {https://doi.org/10.1145/1057661.1057675},
  doi          = {10.1145/1057661.1057675},
  timestamp    = {Wed, 15 Dec 2021 17:59:57 +0100},
  biburl       = {https://dblp.org/rec/conf/glvlsi/LinCLHCLLJ05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/LiuLCHLCHLJ05,
  author       = {Chia{-}Hsien Liu and
                  Tay{-}Jyi Lin and
                  Chie{-}Min Chao and
                  Pi{-}Chen Hsiao and
                  Li{-}Chun Lin and
                  Shin{-}Kai Chen and
                  Chao{-}Wei Huang and
                  Chih{-}Wei Liu and
                  Chein{-}Wei Jen},
  title        = {Hierarchical instruction encoding for {VLIW} digital signal processors},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
                  May 2005, Kobe, Japan},
  pages        = {3503--3506},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/ISCAS.2005.1465384},
  doi          = {10.1109/ISCAS.2005.1465384},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LiuLCHLCHLJ05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}