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ORCIDMatthew M. Ziegler
- > Home > Persons > Matthew M. Ziegler
Publications
- 2015
[j6]Victor V. Zyuban, Joshua Friedrich, Daniel M. Dreps, Jürgen Pille, Donald W. Plass, Phillip J. Restle, Zeynep Toprak Deniz, Matthew M. Ziegler, Sam G. Chu, Md. Saiful Islam, James D. Warnock, Bob Philhower, Rahul M. Rao, Gregory S. Still, David Shan, Eric Fluhr, Jose Paredes, Dieter F. Wendel, Christopher J. Gonzalez, D. Hogenmiller, Ruchir Puri, Scott A. Taylor, Stephen D. Posluszny:
IBM POWER8 circuit design and energy optimization. IBM J. Res. Dev. 59(1) (2015)- [j5]James D. Warnock, Christopher J. Berry, Michael H. Wood, Leon J. Sigal, Yun-Chan Myung, Guenter Mayer, Mark D. Mayo, Y. Chan, Frank Malgioglio, Gerald Strevig
, Charudhattan Nagarajan, Sean M. Carey, Gerard Salem, Friedrich Schroeder, Howard H. Smith, Di Phan, Ricardo Nigaglioni, Thomas Strach, Matthew M. Ziegler, Niels Fricke, K. Lind, José Neves, Sridhar H. Rangarajan, J. P. Surprise, John Isakson, John Badar, Doug Malone, Donald W. Plass, A. Aipperspach, Dieter F. Wendel, Robert M. Averill III, Ruchir Puri:
IBM z13 circuit design and methodology. IBM J. Res. Dev. 59(4/5) (2015) - [c18]James D. Warnock, Brian W. Curran, John Badar, Gregory Fredeman, Donald W. Plass, Yuen H. Chan, Sean M. Carey, Gerard Salem, Friedrich Schroeder, Frank Malgioglio, Guenter Mayer, Christopher J. Berry, Michael H. Wood, Yiu-Hing Chan, Mark D. Mayo, John Isakson, Charudhattan Nagarajan, Tobias Werner, Leon J. Sigal, Ricardo Nigaglioni, Mark Cichanowski, Jeffrey A. Zitz, Matthew M. Ziegler, Tim Bronson, Gerald Strevig, Daniel Dreps, Ruchir Puri, Douglas Malone, Dieter F. Wendel, Pak-kin Mak, Michael A. Blake:
4.1 22nm Next-generation IBM System z microprocessor. ISSCC 2015: 1-3 - 2014
- [c13]Eric J. Fluhr, Joshua Friedrich, Daniel M. Dreps, Victor V. Zyuban, Gregory S. Still, Christopher J. Gonzalez, Allen Hall, David Hogenmiller, Frank Malgioglio, Ryan Nett, Jose Paredes, Juergen Pille, Donald W. Plass, Ruchir Puri, Phillip J. Restle, David Shan, Kevin Stawiasz, Zeynep Toprak Deniz, Dieter F. Wendel, Matthew M. Ziegler:
5.1 POWER8TM: A 12-core server-class processor in 22nm SOI with 7.6Tb/s off-chip bandwidth. ISSCC 2014: 96-97
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