<?xml version="1.0" encoding="US-ASCII"?>
<dblp>
<inproceedings key="conf/cicc/ZhangLLGMZGXCCWTPWYS24" mdate="2026-03-27">
<author>Zhaoyang Zhang 0008</author>
<author>Zhichao Liu</author>
<author orcid="0009-0003-3948-7143">Feiran Liu</author>
<author>Yinhai Gao</author>
<author>Yuchen Ma</author>
<author>Yutong Zhang</author>
<author>An Guo 0001</author>
<author>Tianzhu Xiong</author>
<author>Jinwu Chen</author>
<author>Xi Chen 0107</author>
<author>Bo Wang 0023</author>
<author>Yuchen Tang</author>
<author>Xingyu Pu</author>
<author>Xing Wang</author>
<author orcid="0000-0002-4290-9568">Jun Yang 0006</author>
<author>Xin Si</author>
<title>A 28nm 16kb Aggregation and Combination Computing-in-Memory Macro with Dual-level Sparsity Modulation and Sparse-Tracking ADCs for GCNs.</title>
<pages>1-2</pages>
<year>2024</year>
<booktitle>CICC</booktitle>
<ee>https://doi.org/10.1109/CICC60959.2024.10529053</ee>
<crossref>conf/cicc/2024</crossref>
<url>db/conf/cicc/cicc2024.html#ZhangLLGMZGXCCWTPWYS24</url>
</inproceedings>
</dblp>
