"Hardware Accelerator for Deep Neural Networks on Edge Devices Based on ..."

Yen Ting Ng, Afidalina Tumian, Eric Tatt Wei Ho (2024)

> Home

Details and statistics

DOI: 10.1109/TENCON61640.2024.10902763

access: closed

type: Conference or Workshop Paper

metadata version: 2025-03-17

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/tencon/NgTH24
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/tencon/NgTH24
Yen Ting Ng, Afidalina Tumian, Eric Tatt Wei Ho:
Hardware Accelerator for Deep Neural Networks on Edge Devices Based on RISC-V Open Standard Instruction Set Architecture. TENCON 2024: 370-373

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.