<?xml version="1.0" encoding="US-ASCII"?>
<dblp>
<article key="journals/jssc/KimKLKJK06" mdate="2021-10-22">
<author>Jaeha Kim</author>
<author>Jeong-Kyoum Kim</author>
<author>Bong-Joon Lee</author>
<author>Namhoon Kim</author>
<author>Deog-Kyoon Jeong</author>
<author>Wonchan Kim</author>
<title>A 20-GHz phase-locked loop for 40-gb/s serializing transmitter in 0.13-&#956;m CMOS.</title>
<pages>899-908</pages>
<year>2006</year>
<volume>41</volume>
<journal>IEEE J. Solid State Circuits</journal>
<number>4</number>
<ee>https://doi.org/10.1109/JSSC.2006.870766</ee>
<url>db/journals/jssc/jssc41.html#KimKLKJK06</url>
</article>
</dblp>
