AHMEDABAD INSTITUTE OF TECHNOLOGY

[Link] TOWNSHIP,
GOTA - OGNAJ ROAD, AHMEDABAD-380060.

MICROPROCESSOR & INTERFACING

COMPUTER ENGINEERING
SEMESTER-6

Prepared By:
Tejas Thakkar
 AHMEDABAD INSTITUTE OF TECHNOLOGY
AHMEDABAD

CERTIFICATE
This is to certify that Mr./Ms.__________________
Enrollment No. is student of Ahmedabad
Institute of Technology in course of Bachelor in Computer
Engineering Branch Semester-6 has satisfactorily completed
the course in Microprocessor & Interfacing (3160712)
within the semester.

Date of submission : ______________

Staff in-charge : ______________

Head of Department: ______________

 AHMEDABAD INSTITUTE OF TECHNOLOGY
COMPUTER ENGINEERING
SEMESTER 6

INDEX

SR No. TITLE DATE SIGN

1 Introduction to 8085 microprocessor development Kit.

2 Introduction to 8085 microprocessor Simulator.

3 Programs related to data transfer Instructions group.

4 Programs related to Arithmetic operation Instructions

group.
5 Programs related to Logical Instructions group.

6 Programs related to stack control Instructions group.

7 Programs related to Rotate and Branching Instructions

group.
8 Programs related to developing Counter and Time
Delay Routines.
9 Programs related to Code Conversion.

10 Interfacing Concept of Different types of interfacing

ICs with 8085 microprocessor
 PRACTICAL: 1

AIM: Introduction to 8085 Microprocessor Development Kit.

SYSTEM HARDWARE OVERVIEW:

CENTRAL PROCESSING UNIT

DYNA-85 is based on the INTEL 8085A high performance CPU operating at 3 MHZ.

MEMORY
Powerful system monitor has been provided on a 27c128 EPROM covering 16k bytes. A 6264
battery backup RAM (2K) is provided on the board for inputting & executing programs. Three
28 pin sockets are provided for memory chips so that further expansion of RAM/ EPROM is
possible up to a maximum of 56K.

HEX KEYPAD/ DISPLAY INTERFACE

A keypad with 21 keys & 6 digits LED 7 segment display is provided for interaction with the
system using 8279 keyboard / display controller.

PARALLEL I/O INTERFACE

46 parallel I/O lines are provided on board, 22 from 8155 & 24 from 8255. these lines are
bought on to connector J2 (for 8155) & J3 (for8255).

SERIAL I/O INTERFACE

Serial I/O is available through RS232C compatible port. The SID & SOD lines are used under
software control for serial operation. Baud rates auto adjustable.

TIMER
Three channels of 8253 chip, a 16 bit timer/ counter & one channel of 14 bit timer/counter of
8155 are provided on board. All lines of 8253 are provided on connector J7 & lines of 8155 are
provided on J2.

SYSTEM COMMANDS OVERVIEW:-

The HEX KEYPAD mode supports the following commands:

RESET: Provides hardware reset. Display shows “friend” on pressing this key.

VI: Vector interrupt key. Activates RST 7.5 vectored interrupt.

SET: Allows the user to examine & modify the contents of RAM & only examination of
contents is possible in case of EPROM.

INR: Increments memory address presently displayed in the address field of display.

DCR: Decrements memory address presently displayed in the address field of display.

REG: Allows the user to examine contents of CPU registers & modify them it necessary.
GO: Allows the user to load the program counter by the desired memory address which is the
Starting address of the program to be executed.
EXEC: Used to start the execution of GO or CODE command.

CODE: Used for selecting one of the coded sub routines in the monitor.

STEP: Allows the user to execute the program in single step mode or break point mode.

SAVE: Used for saving the contents of memory onto an audio cassette.

LOAD: Used for loading the program from audio cassette back to memory in RAM area.

U1toU4: These keys are user definable function keys. The functions of these keys can be
defined by user, by loading the appropriate memory locations with vectors pointing to user
subroutines.

MEMORY MAPPING:-
The system memory is also as important as the CPU itself, because this is where the system
program resides & the CPU takes its instruction from the program. The memory is of two types
ROM & RAM ie. READ ONLY MEMORY & RANDOM ACCESS MEMORY.

The DYNA-85 has a flexible memory map, & for your convenience for program development,
the RAM has useful features such as battery back-up.

0000H to 3FFFH: Monitor EPROM

Monitor 2732 is located at 0000H to 0FFFH & is mapped at 1000H-1FFFH,2000H-2FFFH &
3000H-3FFFH also. If 2764/27128 are used, 1000H-3FFFH can be used for further expansion.

4000H to BFFFH: Expansion for EPROM/ RAM

This socket is used for user expansion of EPROM & RAM. EPROMs like
2716/2732/2764/27128/17256 or RAMs like 6116/6226/62256 can be installed by suitable
strapping.

C000H to FFFFH: User RAM IC 6116.

User RAM sockets. The 2K user RAM IC 6116is located at [Link] 2K memory is
folded after every 2K bytes from C000H to FFFFH. In this socket 6264 chip also can be used.

POWER SUPPLY:-
Power supply for DYNA-85 kit should have following specification:

VOLTAGE CURRENT RATING

+5V 1A
+12V 500 Ma
-12V 250 Ma
+30V 100 Ma
PROGRAMMING MODEL:-
The 8085 programming model is as shown in figure 1.

Accumulator A (8) Flag Register

B (8) C (8)
D (8) E (8)
H (8) L (8)
Stack Pointer (SP) (16-bit)
Program counter (PC) (16-bit)

Figure 1-Programming Model

D7 D6 D5 D4 D3 D2 D1 D0
S Z AC P CY

Figure 2-Flag Registers

REGISTERS:-
The 8085 has 6 general purpose register to store 8-bit data; these are classified as B, C, D, E,
and H & L as shown in fig 1. They can be combined as register pairs –BC, DE, and HL to
perform some 16 bit operations. The programmer can use these registers to store or copy data
into the registers by using data copying instructions.

ACCUMULATOR:-
The accumulator is an 8-bit resister that is part of arithmetic/ logic unit (ALU). This resister is
used to store 8-bit data & to perform arithmetic & logic operations. It can also be used as
general purpose register.

FLAGS:-
The ALU includes 5 flip-flops, which are set or reset after an operation according to data
conditions of the result in the accumulator & other registers. They are called Zero (Z), Carry
(CY), Sign (S), Parity (P), & Auxiliary carry (AC) flags; they are listed in table their bit
positions in the flag registers are shown in figure 2.

Z – Zero The zero flag is set to 1 when the result is zero; otherwise it is
reset

CY – Carry If an arithmetic operation results in a carry, the CY flag is set;

otherwise it is reset

S – Sign The sign flag is set if bit D7 of the result is 1; otherwise it is

reset

P – Parity If the result has an even number of 1s the flag is set, for odd
number of 1s, the falg is reset

AC – Auxiliary carry In an arithmetic operation, when carry is generated by digit

D3 and passed to digit D4, AC flag is set
All instructions may not affect the status of flag registers.

PROGRAM COUNTER:-
This 16-bit resister deals with sequencing the execution of instructions and works as memory
pointer. Memory locations have 16-bit addresses hence this is a 16-bit resister. The function of
program counter is to point to memory address from which the next byte is to be fetched.

STACK POINTER:-
The stack pointer is also a 16- bit resister used as a memory pointer. It points to a memory
location in R/W memory, called stack . the beginning of a stack is defined by loading a 16-bit
address in the stack pointer.

OVERVIEW OF INSTRUCTION SET:-

An instruction is a binary pattern entered through an input device into memory to command
microprocessor to perform a specific function. The entire group of instructions for various
functions that MP can perform called the instruction set.

The 8085 has 246 such bit patterns amounting to 74 distinct instructions. It is classified into 5
functional categories; data transfer (copy) operations, arithmetic operations, logical operations,
branching operations, & machine control operations.

DATA TRANSFER (COPY) OPERATIONS:

This group of instructions copies data from a location called a source to another Location,
called a destination, without modifying the contents of source.

ARITHMATIC OPERATIONS:
These instructions perform arithmetic operation such as addition, subtraction, increment, &
decrement.

LOGICAL OPERATIONS:
It performs various logical operation like –

 AND, OR AND EXCLUSIVE-OR of two data.

 Rotate the bit position to right or left o f the data bits in accumulator.
 Comparison of two data for equality, less than or greater than.
 Complementing the bits of given data.

BRANCHING OPERATION:
It alters the sequence of program execution either conditionally or unconditionally.

MACHINE CONTROL OPERATION:

It control machine function such as Halt, Interrupt, or do nothing.
 PRACTICAL: 2

AIM: Introduction to 8085 Microprocessor Simulator

KEYBOARD SHORTCUTS

ESC: RESET

It clears the window, or it clear program counter (PC).

F1: EXAM MEMORY

It is used to enter the memory location.

F2: GO

This is used to go to a particular memory location.

F3: EXECUTE

This is used to execute and check the complication errors in the program.

F4: EXEM REG

How to load and execute a program?

Consider a simple assembly program to add 2 numbers. In this program first we load the
accumulator with 67h, load register B with 12h and then add the contents of register B to the
accumulator. The result is stored in the accumulator.
MVI A, 67
MVI B, 12
ADD B
HLT
The opcodes for this program is given below. (Refer the [Link], 8085
instruction set to convert 8085 mnemonics to hex opcodes).

3E
67
06
12
80
76
Given Below is the procedure to execute this program on the 8085 simulator:

Step 1: Reset

Press the <RESET> button on the 8085 form (or F1 Key on the keyboard).

Step 2: Choose the address to save the program

Let us store the program starting at address 8000H. Press <exm Mem> button and
then press the buttons 8,0,0 and 0.

After this press the <NEXT> button, next press 3E button on the 8085 simulator
followed by <Next> button. Similarly press the buttons for all opcodes followed by <Next>.

<RESET>
<exm Mem> 8000
<Next>
3E
<Next>
67
<Next>
06
<Next>
12
<Next>
80
<Next>
76
<Next>

Step 3: To Execute a program

Press the <GO> button on the 8085 simulator followed by the starting address of the
program 8000 and then press the <Exec> button to begin execution. The program execution
is clearly displayed in the debug Form.

<Go>
8000
<Exec>
3) Delay and time
To give a delay of 100ms use the instruction: CALL 4444.

For 500ms delay use the instruction: CALL 5555

For 1s delay use the instruction: CALL 6666

Note: The delay routines you normally use for 8085 will not produce appropriate
delay on the 8085 simulator. The reason is the simulator works on different processors with
different speeds, and on different platforms and also different programs running in the
background hence it is very difficult to simulate the time delay due to instruction iterations.
Therefore instead of the delay routines which you normally use use the above instructions to
(call the system routines to) produce the delay.

4) Address field and data field

To display data in the data field

First the data to be displayed in the data field should be stored at the memory address
8FF1 and then use the instruction: CALL 044C.

To display data in the address field

First the data to be displayed in the address field should be stored at the memory address
8FEF (lower byte) and 8FF0 (higher byte) and then use the instruction: CALL 0440.

REMEMBER: use HLT instruction to terminate the program if you want to display

The data in the address field. Use of RST 5 instruction clears both the address and the
Field. (Also this is the behavior of most 8085 microprocessor college kits)
 PRACTICAL: 3

AIM: Programs related to Data Transfer Instructions group.

It includes the instructions that move (copies) data between registers or between
memory locations and registers. In all data transfer operations the content of source register is
not altered. Hence the data transfer is copying operation.

Explanation of
Opcode Operand Description
Instruction
This instruction copies the contents of the source
Rd, Rs register into the destination register; the contents of the
Copy from source register are not altered. If one of the operands is a
MOV M, Rs source(Rs) to memory location, its location is specified by the contents
destination(Rd) of the HL registers.
Rd, M
Example: MOV B, C or MOV B, M
The 8-bit data is stored in the destination register or
Rd, data memory. If the operand is a memory location, its
Move immediate 8-
MVI location is specified by the contents of the HL registers.
bit
M, data
Example: MVI B, 57H or MVI M, 57H
The contents of a memory location, specified by a 16-bit
address in the operand, are copied to the accumulator.
16-bit
LDA Load accumulator The contents of the source are not altered.
address
Example: LDA 2034H
The contents of the designated register pair point to a
memory location. This instruction copies the contents of
that memory location into the accumulator. The contents
B/D Reg. Load accumulator
LDAX of either the register pair or the memory location are not
pair indirect
altered.

Example: LDAX B
The instruction loads 16-bit data in the register pair
Reg. pair,
Load register pair designated in the operand.
LXI 16-bit
immediate
data
Example: LXI H, 2034H or LXI H, XYZ
The instruction copies the contents of the memory
location pointed out by the 16-bit address into register L
and copies the contents of the next memory location into
16-bit Load H and L
LHLD register H. The contents of source memory locations are
address registers direct
not altered.

Example: LHLD 2040H

16-bit The contents of the accumulator are copied into the
STA 16-bit address
address memory location specified by the operand. This is a 3-
 byte instruction, the second byte specifies the low-order
address and the third byte specifies the high-order
address.

Example: STA 4350H

The contents of the accumulator are copied into the
memory location specified by the contents of the
Store accumulator operand (register pair). The contents of the accumulator
STAX Reg. pair
indirect are not altered.

Example: STAX B
The contents of register L are stored into the memory
location specified by the 16-bit address in the operand
and the contents of H register are stored into the next
memory location by incrementing the operand. The
16-bit Store H and L contents of registers HL are not altered. This is a 3-byte
SHLD
address registers direct instruction, the second byte specifies the low-order
address and the third byte specifies the high-order
address.

Example: SHLD 2470H

The contents of register H are exchanged with the
contents of register D, and the contents of register L are
Exchange H and L
XCHG none exchanged with the contents of register E.
with D and E
Example: XCHG
Output data from The contents of the accumulator are copied into the I/O
8-bit port accumulator to a port specified by the operand.
OUT
address port with 8-bit
address Example: OUT F8H
Input data to The contents of the input port designated in the operand
8-bit port accumulator from a are read and loaded into the accumulator.
IN
address port with 8-bit
address Example: IN 8CH
EXERCISE:
1) Write single equivalent instruction for the following programs.
a) MVI D, F0H b) MOV A, L
MVI E, 00H STA F000H
XCHG MOV A, H
MOV M, A STA F001H

2) Write an assembly language program to interchange the data content stored at

memory location F000H and F001H.

3) Write an assembly language program to interchange the 16-bit data stored in register
BC and register DE (with and without XCHG instruction).

4) A two 16-bit data are stored in consecutive memory location starting from F000H
with lower bytes stored first. Write an assembly language program to copy this data in
four consecutive memory locations starting from D000H.

5) Write an assembly language program to load register pair BC and DE with 16-bit of
data F0F1H and E0E1H respectively and copy this data in consecutive memory
location starting with lower bytes first.

6) Write and A.L.P. to delete the data byte (i.e. make „00H‟) stored at memory location
whose address is stored at DE register pair.
 PRACTICAL: 4

AIM: Programs related to Arithmetic Instructions group.

Includes the instructions, which performs the addition, subtraction, increment or

decrement operations. The flag conditions are altered after execution of an instruction in this
group.

Explanation of
Opcode Operand Description
Instruction
The contents of the operand (register or memory) are
added to the contents of the accumulator and the result is
stored in the accumulator. If the operand is a memory
R Add register or
location, its location is specified by the contents of the HL
ADD memory, to
registers. All flags are modified to reflect the result of the
M accumulator
addition.

Example: ADD B or ADD M

The contents of the operand (register or memory) and M
the Carry flag are added to the contents of the
accumulator and the result is stored in the accumulator. If
R Add register to
the operand is a memory location, its location is specified
ADC accumulator
by the contents of the HL registers. All flags are modified
M with carry
to reflect the result of the addition.

Example: ADC B or ADC M

The 8-bit data (operand) is added to the contents of the
accumulator and the result is stored in the accumulator.
Add immediate
ADI 8-bit data All flags are modified to reflect the result of the addition.
to accumulator
Example: ADI 45H
The 8-bit data (operand) and the Carry flag are added to
the contents of the accumulator and the result is stored in
Add immediate
the accumulator. All flags are modified to reflect the
ACI 8-bit data to accumulator
result of the addition.
with carry
Example: ACI 45H
The instruction loads 16-bit data in the register pair
Reg. pair,
Load register designated in the operand.
LXI 16-bit
pair immediate
data
Example: LXI H, 2034H or LXI H, XYZ
The 16-bit contents of the specified register pair are added
to the contents of the HL register and the sum is stored in
Add register the HL register. The contents of the source register pair
DAD Reg. pair pair to H and L are not altered. If the result is larger than 16 bits, the CY
registers flag is set. No other flags are affected.

Example: DAD H
 The contents of the operand (register or memory ) are
subtracted from the contents of the accumulator, and the
Subtract result is stored in the accumulator. If the operand is a
R
register or memory location, its location is specified by the contents
SUB
memory from of the HL registers. All flags are modified to reflect the
M
accumulator result of the subtraction.

Example: SUB B or SUB M

The contents of the operand (register or memory ) and M
the Borrow flag are subtracted from the contents of the
Subtract source accumulator and the result is placed in the accumulator. If
R
and borrow the operand is a memory location, its location is specified
SBB
from by the contents of the HL registers. All flags are modified
M
accumulator to reflect the result of the subtraction.

Example: SBB B or SBB M

The 8-bit data (operand) is subtracted from the contents of
the accumulator and the result is stored in the
Subtract
accumulator. All flags are modified to reflect the result of
SUI 8-bit data immediate from
the subtraction.
accumulator
Example: SUI 45H
The contents of register H are exchanged with the
Subtract
contents of register D, and the contents of register L are
immediate from
SBI 8-bit data exchanged with the contents of register E.
accumulator
with borrow
Example: XCHG
The contents of the designated register or memory) are
incremented by 1 and the result is stored in the same
R Increment
place. If the operand is a memory location, its location is
INR register or
specified by the contents of the HL registers.
M memory by 1
Example: INR B or INR M
The contents of the designated register pair are
Increment incremented by 1 and the result is stored in the same
INX R register pair by place.
1
Example: INX H
The contents of the designated register or memory are M
decremented by 1 and the result is stored in the same
R Decrement
place. If the operand is a memory location, its location is
DCR register or
specified by the contents of the HL registers.
M memory by 1
Example: DCR B or DCR M
The contents of the designated register pair are
Decrement decremented by 1 and the result is stored in the same
DCX R register pair by place.
1
Example: DCX H
 The contents of the accumulator are changed from a
binary value to two 4-bit binary coded decimal (BCD)
digits. This is the only instruction that uses the auxiliary
flag to perform the binary to BCD conversion, and the
conversion procedure is described below. S, Z, AC, P, CY
flags are altered to reflect the results of the operation.

Decimal adjust If the value of the low-order 4-bits in the accumulator is

DAA none
accumulator greater than 9 or if AC flag is set, the instruction adds 6 to
the low-order four bits.

If the value of the high-order 4-bits in the accumulator is

greater than 9 or if the Carry flag is set, the instruction
adds 6 to the high-order four bits.

Example: DAA
EXERCISE:

1) For three different cases shown in following table, write instruction to store data byte
into accumulator and register E and subtracts contents of register E from accumulator.
Store result in accumulator and fill up the table.
[Link]. A E A-E Flags
S Z CY
1 F3H 1EH

2 1DH 1DH

3 25H 9AH

2) Write a single equivalent instruction for the following program.

MOV A, L
ADD L
MOV L, A
MOV A, H
ADC H
MOV H, A

3) Write a program for Addition of two 8-bit numbers stored in register.

4) Write a program for Subtraction of two 8-bit numbers stored in register.

5) Two 16-bit data bytes are stored from memory location F0F5H with lower bytes
stored first. Add these two 16 bit data and store the result from F0F9H.

6) It is required to multiply a number stored in accumulator by 3. Write an ALP for

this application.

7) Two data bytes are stored in memory location E041H and E042H. Write an ALP to add
the higher 4 bits of first data with lower 4 – bits of second data. Store the result in
memory location E043H.

8) Write a program to add the two numbers FFH and 0BH. From the result subtract
numbers 05H. Store higher order byte in H and store lower order byte in L.
 PRACTICAL: 5

AIM: Programs related to Logical Instructions group.

The instructions which performs the logical operations like AND, OR, EXCLUSIVE-
OR, complement, compare and rotate instructions are grouped under this heading. The flag
conditions are altered after execution of an instruction in this group.

Explanation of
Opcode Operand Description
Instruction
The contents of the operand (register or memory) are M
compared with the contents of the accumulator. Both
contents are preserved. The result of the comparison is
Compare shown by setting the flags of the PSW as follows:
R
register or
CMP
memory with if (A) < (reg/mem): carry flag is set
M
accumulator if (A) = (reg/mem): zero flag is set
if (A) > (reg/mem): carry and zero flags are reset

Example: CMP B or CMP M

The second byte (8-bit data) is compared with the contents
of the accumulator. The values being compared remain
unchanged. The result of the comparison is shown by
setting the flags of the PSW as follows:
Compare
8-bit
CPI immediate with
data if (A) < data: carry flag is set
accumulator
if (A) = data: zero flag is set
if (A) > data: carry and zero flags are reset

Example: CPI 89H

The contents of the accumulator are logically ANDed with
M the contents of the operand (register or memory), and the
Logical AND result is placed in the accumulator. If the operand is a
R
register or memory location, its address is specified by the contents of
ANA
memory with HL registers. S, Z, P are modified to reflect the result of the
M
accumulator operation. CY is reset. AC is set.

Example: ANA B or ANA M

The contents of the accumulator are logically ANDed with
the
Logical AND 8-bit data (operand) and the result is placed in the
8-bit
ANI immediate with accumulator. S, Z, P are modified to reflect the result of the
data
accumulator operation. CY is reset. AC is set.

Example: ANI 86H

Exclusive OR The contents of the accumulator are Exclusive ORed with
R
XRA register or M the contents of the operand (register or memory), and the
M
memory with result is placed in the accumulator. If the operand is a
 accumulator memory location, its address is specified by the contents of
HL registers. S, Z, P are modified to reflect the result of the
operation. CY and AC are reset.

Example: XRA B or XRA M

The contents of the accumulator are Exclusive ORed with
the 8-bit data (operand) and the result is placed in the
Exclusive OR
8-bit accumulator. S, Z, P are modified to reflect the result of the
XRI immediate with
data operation. CY and AC are reset.
accumulator
Example: XRI 86H
The contents of the accumulator are logically ORed with M
the contents of the operand (register or memory), and the
Logical OR result is placed in the accumulator. If the operand is a
R register or memory location, its address is specified by the contents of
ORA
M memory with HL registers. S, Z, P are modified to reflect the result of the
accumulator operation. CY and AC are reset.

Example: ORA B or ORA M

The contents of the accumulator are logically ORed with the
8-bit data (operand) and the result is placed in the
Logical OR
8-bit accumulator. S, Z, P are modified to reflect the result of the
ORI immediate with
data operation. CY and AC are reset.
accumulator
Example: ORI 86H
Each binary bit of the accumulator is rotated left by one
position. Bit D7 is placed in the position of D0 as well as in
Rotate the Carry flag. CY is modified according to bit D7. S, Z, P,
RLC none
accumulator left AC are not affected.

Example: RLC
Each binary bit of the accumulator is rotated right by one
position. Bit D0 is placed in the position of D7 as well as in
Rotate
the Carry flag. CY is modified according to bit D0. S, Z, P,
RRC none accumulator
AC are not affected.
right
Example: RRC
Each binary bit of the accumulator is rotated left by one
position through the Carry flag. Bit D7 is placed in the
Rotate Carry flag, and the Carry flag is placed in the least
RAL none accumulator left significant position D0. CY is modified according to bit D7.
through carry S, Z, P, AC are not affected.

Example: RAL
Rotate Each binary bit of the accumulator is rotated right by one
accumulator position through the Carry flag. Bit D0 is placed in the
RAR none
right through Carry flag, and the Carry flag is placed in the most
carry significant position D7. CY is modified according to bit D0.
 S, Z, P, AC are not affected.

Example: RAR
The contents of the accumulator are complemented. No
Complement flags are affected.
CMA none
accumulator
Example: CMA
The Carry flag is complemented. No other flags are
Complement affected.
CMC none
carry
Example: CMC
Set Carry
STC none Set Carry
Example: STC

EXERCISE:

1. Write an ALP to ANDing two nos without using AND Instructions.

2. Write an ALP to ORing two nos without using OR Instructions

3. Write an ALP to clear the higher 4-bit of the content stored at location 2000h.

4. Write an ALP to set the whole number (Make it FFh) stored at location 2050h.

5. Write an ALP to EX-OR of 2 nos. 2454h & 6524h, store the answer in HL pair.

6. Write an ALP to compare 2 8bit data stored from 2010h and write status of CY & Z
Flags.
 PRACTICAL: 6

AIM: Programs related to Stack Control Instructions group.

The instruction loads the contents of the H and L

registers into
the stack pointer register, the contents of the H register
Copy H and L provide the high-order address and the contents of the
SPHL none registers to the stack L register provide the low-order address. The contents
pointer of the H
and L registers are not altered.

Example: SPHL
The contents of the L register are exchanged with the
stack location pointed out by the contents of the stack
pointer register. The contents of the H register are
Exchange H and L exchanged with the next stack location (SP+1);
XTHL none
with top of stack however, the contents of the stack pointer register are
not altered.

Example: XTHL
The contents of the register pair designated in the
operand are copied onto the stack in the following
sequence. The stack pointer register is decremented
and the contents of the highorder register (B, D, H, A)
Push register pair
PUSH Reg. pair are copied into that location. The stack pointer register
onto stack
is decremented again and the contents of the low-order
register (C, E, L, flags) are copied to that location.

Example: PUSH B or PUSH A

The contents of the memory location pointed out by
the stack pointer register are copied to the low-order
register (C, E, L, status flags) of the operand. The
stack pointer is incremented by 1 and the contents of
Pop off stack to
POP Reg. pair that memory location are copied to the high-order
register pair
register (B, D, H, A) of the operand. The stack pointer
register is again incremented by 1.

Example: POP H or POP A

 PRACTICAL: 7

AIM: Programs related to Rotate and Branching Instructions group.

The instructions that are used to transfer the program control from one memory location
to another memory location are grouped under this heading.

Explanation of
Opcode Operand Description
Instruction
The program sequence is transferred to
the memory location specified by the
16-bit Jump
JMP 16-bit address given in the operand.
address unconditionally
Example: JMP 2034H or JMP XYZ
Flag
Opcode Description
Status
Jump on CY =
JC
Carry 1
Jump on no CY =
JNC
Carry 0
Jump on The program sequence is transferred to
JP S=0 the memory location specified by the
positive
16-bit address given in the operand
Jump on 16-bit Jump
JM S=1 based on the specified flag of the PSW
minus address conditionally
as described below.
Jump on
JZ Z=1
zero Example: JZ 2034H or JZ XYZ
Jump on no
JNZ Z=0
zero
Jump on
JPE P=1
parity even
Jump on
JPO P=0
parity odd

Flag
Opcode Description
Status
The program sequence is transferred to
Call on CY =
CC the memory location specified by the
Carry 1 16-bit address given in the operand.
Call on no CY = Before the transfer, the address of the
CNC
Carry 0 16-bit Unconditional next instruction after CALL (the
Call on address subroutine call contents of the program counter) is
CP S=0 pushed onto the stack.
positive
Call on
CM S=1 Example: CALL 2034H or CALL
minus
XYZ
Call on
CZ Z=1
zero
 Call on no
CNZ Z=0
zero
Call on
CPE P=1
parity even
Call on
CPO P=0
parity odd
The program sequence is transferred
from the subroutine to the calling
program. The two bytes from the top of
Return from
the stack are copied into the program
RET none subroutine
counter, and program execution begins
unconditionally
at the new address.

Example: RET
Flag
Opcode Description
Status
Return on CY =
RC
Carry 1
Return on CY =
RNC The program sequence is transferred
no Carry 0
from the subroutine to the calling
Return on program based on the specified flag of
RP S=0
positive the PSW as described below. The two
Return from
Return on bytes from the top of the stack are
RM S=1 none subroutine
minus copied into the program counter, and
conditionally
Return on program execution begins at the new
RZ Z=1 address.
zero
Return on Example: RZ
RNZ Z=0
no zero
Return on
RPE P=1
parity even
Return on
RPO P=0
parity odd
The contents of registers H and L are
Load program copied into the program counter. The
PCHL none counter with contents of H are placed as the high-
HL contents order byte and the contents of L as the
low-order [Link]: PCHL
The RST instruction is equivalent to a
1-byte call instruction to one of eight
memory locations depending upon the
RST number. The instructions are generally
0-7 Restart used in conjunction with interrupts and
inserted using external hardware.
However these can be used as software
instructions in a program to transfer
program execution to one of the eight
locations. The addresses are:

Restart
Instruction
Address
RST 0 0000H
RST1 0008H
RST 2 0010H
RST 3 0018H
RST 4 0020H
RST 5 0028H
RST 6 0030H
RST 7 0038H

The 8085 has four additional interrupts

and these interrupts generate RST
instructions internally and thus do not
require any external hardware. These
instructions and their Restart addresses
are:

Restart
Interrupt
Address
TRAP 0024H
RST 5.5 002CH
RST 6.5 0034H
RST 7.5 003CH
EXERCISE:

1) Write a program to store data „AB‟H at each memory locations starting from F0F0H
to F0FFH.

2) Write an ALP to find out maximum number in a block of data. The block starts at
E000H. The first data show length of block. Store the result at the end of the block.

3) Write a program for transfer a block of data from one memory location to another
memory location.

4) Write a program to exchange the nibbles of a data byte without use of

ROTATE instructions. Data is stored at memory location C050H. Store
result at memory location C051H.

5) Write a program to find whether the number is odd or even in an given array.

6) Write a program to find maximum number in an given array.

7) Write a program to arrange the given array in ascending order

 PRACTICAL: 8

AIM: Programs related to developing Counter and Time Delay Routines.

1) Write a subroutine to generate delay of 100 (assume 320 ns clock cycle )

2) Write a program to generate a delay of 0.5 sec if crystal frequency is 5 MHz

3) Write a program for displaying binary up counter. Counter should count numbers from 00 to
FFH and it should increment after every 0.5 [Link] operating frequency of 8085 equal to
2 MHz . Display routine is available.
 PRACTICAL: 9

AIM: Programs related to Code Conversion.

1) Write an ALP to convert Binary number into BCD number.

2) Write an ALP to convert the contents of 5 memory location from 2000 H into an ASCII character.
Place the result in other 5 memory location starting from 2200H

3) Convert the ASCII number in memory to its equivalent decimal number

 PRACTICAL: 10

AIM: Interfacing Concept of Different types of interfacing ICs with 8085

Microprocessor