Die attachment Process Overview for High Power

Semiconductors
Marcin Myśliwiec1,2 and Ryszard Kisiel1
1
Institute of Microelectronics and Optoelectronics, Warsaw University of Technology
2023 46th International Spring Seminar on Electronics Technology (ISSE) | 979-8-3503-3484-5/23/$31.00 ©2023 IEEE | DOI: 10.1109/ISSE57496.2023.10168484

Warsaw, Poland
2
Centre for Advanced Materials and Technologies CEZAMAT, Warsaw University of Technology
Warsaw, Poland
[Link]@[Link]

Abstract— The article reviews the most common assembly Therefore, WBG structures are usually assembled inside a
techniques: soldering, solid-liquid interdiffusion (SLID) metal or ceramic package or on ceramic substrates (e.g., DBC
bonding and sintering used to assemble high power or AlN). Such packages meet the requirements for operation
semiconductors. The review of techniques has been at high temperatures. The layer connecting the bottom of the
supplemented by own research dedicated to the modification of chip to the substrate can be made by one of the following
sintering techniques based on Ag paste with a small addition of methods: soldering, sintering, SLID (Solid-Liquid
resin. The following criteria were used: adhesion and thermal InterDiffusion) or adhesive die attach, Fig.1. [4-6]. Each of
properties. It was found that using a two-step pressureless
these methods requires a different bonding material, which
sintering process: drying at 60 °C for 10 min, place chip on hot
must be compatible with the metallization of the surfaces to
paste and sintering at 175 °C for 30 min, good adhesion
(>10 MPa) and low joint thermal resistance (less than 0.1 K/W)
be bonded. The bonding material can be introduced between
can be achieved. the surfaces to be joined in the form of a paste, a spacer of thin
film, or deposited, for example by electroplating, on one or
Keywords—die attachment, sintering, high temperature both joined surfaces. Practical considerations dictate that
electronics industry is most likely to accept a bonding material in paste
form. The developed materials and assembly technologies are
I. INTRODUCTION expected to meet the stringent operating conditions required
In the last decade, there have been significant changes in by: the automotive industry, green energy sector, broadband
the assembly technology of high-temperature SiC or GaN LEDs, broadband electronics and aerospace and military.
semiconductors compared to Si technology. These changes II. OVERVIEW OF WBG CHIP ASSEMBLY TECHNIQUES FOR
are mainly driven by market needs and the need to exploit the
SUBSTRATES SUITABLE FOR OPERATION AT HIGH
advantages of WBG (Wide Band Gap). This requires the
TEMPERATURES
development of assembly techniques for devices capable of
continuous operation at temperatures > 250 °C and A. Solderning
additionally effectively cooled. It is necessary to develop new Soldering is one of the most widely used technologies for
types of packages and interconnect materials with very good assembling WBG chips to substrates [6-8]. In the case of SiC
thermal conductivity (> 150 W/mK), and acceptable or GaN chips capable of operating at high temperatures, it
interfacial adhesive strength (> 5 MPa) as well as adequate should be noted that for a reliable solder joint, the operating
flexural modulus and electrical conductivity. [1-3]. temperature of the joining material should not exceed 80% of
its melting point (on an absolute scale). For this reason,
eutectic AuSi (363 °C), or AuGe (356 °C), or high-melting
AuSn (280 °C) or PbSn (~300 °C) solders are suitable for
working at high temperatures (250 °C and above). If the
acceptable operating temperature can be slightly lower (about
175 °C) but higher than that allowed for Si technology
(~150 °C), it is possible to use so-called "soft sellers", i.e.
solders from the SAC group. The classic type of high-
temperature solder is AuSn solder. It is characterized by good
electrical and thermal properties. It is inserted between the
surfaces to be joined in the form of a thin film, and no flux is
required for soldering. Unfortunately, its major disadvantage
is high price, about a dozen times higher than SAC solder [9].
Therefore, it is used in specific applications like microwave
devices or laser diodes. A much cheaper, but not perspective
solution is the use of Pb5Sn solder (RoHS directive
restrictions). In addition, the use of high-lead solder in WBG
chip assembly is associated with technological difficulties.
Fig. 1. Comparison of assembly techniques materials and process flow. First, heating to high temperatures (> 320 °C) is required,
This project has received funding from the European Union’s which slows down assembly lines. Extended heating and then
HORIZON 2020 research and innovation program under grant agreement
No 821963.

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 cooling times often result in increased voids and oxidation. metallization on the chip and substrate surfaces. Classification
Tab.1 summarizes the basic physical and technological of sintering methods can be made according to at least two
parameters of typical metallizations (Au, Ag) and joining criteria: powder size and application of pressure during
materials. The mechanical properties of solder joints are good, sintering. The classification according to the size of the
and their adhesion exceeds 10 MPa. The basic requirement for powder is a division into nano powders (sizes from tens of nm
solders is that the metallization of the surfaces to be soldered to hundreds of nm) and micro (few micrometers) or sub-micro
should be wetted by the solder, i.e. the final metallization powders (size of about 1 μm). In the case of Ag nano-powders,
joining the solder should be Au, Ag, Cu or Ni. Additionally, the bonding process can be carried out at temperatures in the
that is necessary to apply flux for surface cleaning before range of 220-240 °C, often without pressure (or with pressure
soldering. This complicates the soldering process as an below 0.5 MPa), while in the case of pastes based on
additional operation to remove flux residues and cleaning micropowders, pressure ranging from 10 MPa to even 40 MPa
reaction products is often required. In industrial practice, must be applied to carry out the process in similar temperature
solders are available in the form of solder pastes and are range. Such high pressures guarantee bonding material
applied by screen printing methods (through metal templates) properties similar to those of solid materials. In the last
or by dispensing techniques. Those techniques are useful in decade, the most research works were devoted to sintering
high volume production. technology based on Ag nanopowders, due to the possibility
of joining at temperatures slightly exceeding 200 °C under
The other critical parameter of joining materials is their low pressure [15-17]. This makes it possible to obtain a
thermal conductivity. In general practice, it is convenient to material with a resistivity of about 2.4 µΩcm and a thermal
evaluate joining materials by the thermal resistance parameter conductivity in the range of 100-250 W/mK (depending on the
Rth, which consists not only of the thermal conductivity of the density of the bonding layer).
joining material, but also of the geometry of the joint and the
quality of the solder - joined surfaces interface. The paper [8] However, it should be remembered that pastes based on
compares the thermal resistances of SiC chip-substrate joints nano Ag are very expensive, easily agglomerate and are
made using different materials. These resistances are difficult to apply, and are characterized by high shrinkage
respectively for Pb5Sn solder Rth=0.65-0.67 K/W, for SnCu during sintering. An important direction of work based on
solder 0.56-0.59 K/W, and for SAC solder 0.57-0.58 K/W. nano Ag is to master the technology of sintering without
Joints made with sintering technology were characterized by pressure. This makes it possible to use sintering without
thermal resistance Rth = 0.51-0.53 K/W. The same joints were pressure in typical through-hole furnaces. This technology is
evaluated in a power cycling test (ΔT = 150 °C). It was found, still being developed but requires Ag metallization on the chip
joints made with Pb5Sn solder failed after 8 000 cycles, while and substrate [18, 19]. There is a considerable amount of voids
joints made with SnCu or SAC solder and sintering in this type of interconnect, which deteriorates the thermal
technology did not fail even 20 000 cycles. performance of the interconnect.

TABLE I. MAIN PARAMETERS OF TYPICAL More and more work is devoted to Ag pastes with
METALLIZATIONS AND JOINING MATERIALS [1]. micrometer sizes [20, 21]. Pastes based on Ag powders of
submicrometer and micrometer sizes are cheaper than nano
Melting Young’s 
Material
point [°C] Modulus [GPa]
CTE
[W/mK]
Ag pastes, and allow to obtain bonding layers with good
Au 1064 73 14,2 performance. It is important that the thickness of the joining
Ag 961 76 19 400 layer is between 20 and 60 µm, as too thin layers generate too
Sintering Ag ~961 9-60 18-23 100 - high stresses caused by TCE mismatch, and too thick layers
250 increase the thermal resistance of the joint [22]. The joining
Pb5Sn 312 28 28,4 36 process can be carried out at temperatures of 220-250 °C,
SnAgCuSb 226 46,2 24,2 57 usually under pressure (10 - 40 MPa). Using such high
Au20Sn 280 69 16 57
pressures, it is possible to obtain a material with properties
AnSn SLID 650 76-88 - ~57
similar to solid material (thermal conductivity
B. Sintering 150 - 250 W/mK). With sintering, there are no fluxes and no
Difficulties associated with the use of high-lead solders cleaning is required. A limitation is the possibility of
have directed the efforts of researchers to the sintering process electromigration of Ag ions, hence the need for migration
with Ag pastes. The sintering process is based on the barrier and further research.
phenomenon of spontaneous bonding of nano- and micro- A separate group are the so-called organic die attach, Ag
sized Ag powders under high temperature and pressure. The pastes with a small addition of resins (from several to 20% by
most commonly used sintering material is a paste-like weight) [13, 17]. Addition of resins allows to use so called
suspension of Ag powders in solvents, which is applied "pressureless sintering" and to perform joining processes at
between the surfaces to be bonded by printing through a temperatures below 200 °C. This is important in the assembly
stencil or by dosing from pressure dispensers. The sintering of GaN-on-Si devices, where the chip structure is multilayer
technology is very useful for high-temperature electronics, the and the component layers are thin, brittle and additionally with
joining process can be carried out at temperatures in the range different TCE. By balancing the resin content in the paste and
of 220 - 300 °C, and obtained joints are capable of working at the size and shape of the Ag particles in the paste, it is possible
temperatures above 300 °C [10-14]. The sintering process to obtain bonding layers with adhesion ranging from 10 MPa
consists of the following operations: application of Ag paste to 35 MPa and with thermal conductivity ranging from a few
to the substrate (by screen printing or dispensing technique), W/mK to 150 W/mK [13, 17]. For operation at temperatures
placement of the chip onto the paste, drying of the paste to around 200 °C, an interesting alternative is the technology of
remove organics and the actual sintering operation. The so-called organic die attach materials based on a mixture of
process is usually carried out under pressure, often in a Ag powders. An important property of these materials is the
protective atmosphere. It is required to use Ag, Au, Ni or Cu possibility of assembling bare Si (e.g. GaN-on -Si) to

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 substrates with Au metallization (e.g. DBC substrates, or in contact resistance between the metallization on the substrate
metal packages). and the TIM material Rth-int, the thermal resistance of the TIM
material itself Rth-mat, the contact resistance of the TIM
C. SLID technology material and the substrate Rth-int (Fig. 3) and the sum of these
Solid Liquid Inter-Diffusion technology (SLID), also resistances is the subject of the evaluation.
known as TLP (Transient Liquid Phase), is based on the
formation of a bonding layer based on intermetallic bonds
between Sn or In and high temperature melting materials such
as Au, Ag, Cu or Ni [5, 23, 24]. The bonding layer can be
achieved in two ways: by inserting a thin film of Sn or In
between the bonded surfaces or by deposition of a thin layer
of Sn or In on the bonded surfaces coated with Au, Ag, Cu or Fig. 2. Test sample, method of determining the thermal resistance of the test
Ni. In the SLID process, at temperatures above the melting bench.
point of Sn (>232 °C) or In (156 °C), the base metallization
material is combined with liquid Sn or In. The resulting liquid The parameters of joints formed using H20E (Epotek
fills surface roughness, mutual diffusion occurs first in the Technology) adhesive and SAC solder were used as the basis
liquid phase and then in the solid phase, and intermetallic for comparisons of the above-mentioned properties. To
compounds are formed between the Sn (or In) and the evaluate the sintering joints, they were formed between two
substrate material. Cu substrates with NiAu metallization using TIM AT2M62
paste.
During the bonding process, a small force is applied to
improve contact between the bonded surfaces. It is advised to
anneal the junction for several minutes to homogenize the
junction area (diffusion in the solid state is much slower than
in the liquid phase). The maximum operating temperatures for
Au-Sn system reach 418 °C, for Cu-Sn system 408 °C, for Ag-
Fig. 3. Method of determining the tested thermal resistance of Au/Au
Sn system 480 °C and for Ag-In system 600 °C [25]. interface with bonding layer made of TIM AT2M62 paste.
When considering the SLID technique, it should be kept
in mind that the resulting intermetallic layers are brittle The substitute thermal scheme of the test specimen is
(especially Cu-Sn) and Au-Sn based systems are expensive to shown in Fig.3. After measuring the thermal resistance of the
manufacture [26]. whole specimen in the Rth total test bench, the thermal resistance
of the Rth-c bench and the thermal resistance of the Cu
III. WORK ON ASSEMBLING WBG CHIPS TO SUBSTRATES substrates Rth-Cu were subtracted. Au/Au interface resistances
consisting of two contact resistances Rth-int and the thermal
Our recent work has focused on evaluating different
resistance of the test material Rth mat were obtained.
variants of Ag paste sintering technology. The focus was on
the thermal parameters of the joints and the possibility of Two Ag paste sintering assembly technologies were the
interfacing Ag pastes with different metallizations. The paste subject of the evaluation (Version No. 1: assembly of the chip
used in the study was TIM AT2M62 from Amepox Poland, onto paste at room temperature and Version No. 2 assembly
consisting of a mixture of flake-type Ag powders of 1-3 µm of the chip onto paste pre-dried at 60 °C for 10 minutes). The
(40% by weight) and sphere-type Ag powders of several µm drying operation allows to partially get rid of volatile parts
(60% by weight) with the addition of 8% by weight resin. Two from the paste. It is worth noting that for practical reasons,
basic parameters of the joints were verified: adhesion and drying complicates and prolongs the sintering process. The
thermal parameters of the joint. The thermal parameters of the sintering operation was carried out at 175 °C for 30 min
joints were tested by measuring the thermal resistance of the without pressure. The results of Au/Au interface resistance
joints in the test samples. The subject of evaluation was the and adhesion measurements are summarized in Tab. 2.
thermal resistance made with TIM AT2M62 paste between the
surfaces: Au/Au and Si/Au. Adhesion tests used 3 mm x 3 mm TABLE II. RTH AND ADHESION MEASUREMENTS FOR AU/AU
Si chips with TiAu metallization assembled to Cu substrates INTERFACE, N - SAMPLE COUNT
with NiAu metallization. Thermal properties
Adhesion
Sample Rth total Rth measured
A. Au/Au joints [MPa]
[K/W] [K/W]
To study the thermal performance of Au/Au joints, 10 mm SAC solder N=5 2.08±0.01 0.08 ±0.01 > 10 MPa
x 10 mm specimens made of Cu coated with NiAu were used. H20E N=7 2.33±0.03 0.33±0.03 > 10 MPa
TIM AT2M62 N=6 2.14±0.03 0.14±0.03 N=8 11.5 ± 1.0
First, the resistance of the test stand was determined. For this wet
purpose, a 10 mm x 10 mm x 0.01mm pure copper sample was TIM AT2M62 N=5 2.08±0.05 0.08±0.05 N=8 12.5 ± 0.8
placed in it and the thermal resistance of the test bench along pre-dried
with the sample was measured, Fig.2. By subtracting the
resistance of the Cu sample from the measured resistance of
the test bench, the resistance of the test bench was obtained. Reference samples with joints made with SAC solder and
Subsequently, test samples from the Au/Au interface were H20E adhesive similarly to samples made by sintering
placed in the bench and the total resistance was measured, and technology have good adhesion exceeding 10 MPa. The
after subtracting the thermal resistance of the test bench, the thermal resistance of the Au/Au interface for samples made by
thermal resistance of the tested interfaces along with the TIM sintering technology is lower than that of the sample made
bonding layer was obtained [27]. It is worth noting that the with H20E adhesive. The thermal resistance of the sample
resistance thus determined consists of three resistances: the soldered with SAC solder is similar to that of the sample made
by sintering technology version no 2 (dry). In comparison, the

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 thermal resistance of the sample made with sintering TABLE III. RTH AND ADHESION MEASUREMENTS FOR AU/SI
INTERFACE, N - SAMPLE COUNT
technology version no 1 (wet) is higher than that of the sample
made with sintering technology version no 2 (dry). The Thermal properties
explanation for this phenomenon can be related to the Sample Rth total [K/W] Rth measured Adhesion [MPa]
[K/W]
presence of more voids and cracks in the interface layer made
Interface Au/Si, N= 6 2.20±0.02 0.07 ±0.02 N=6 12.6 ± 1.0
with the sintering version no 1 (wet), Fig.4 than in the layer Version 1, wet
made with the version no 2 (dry) Fig.5. Interface Au/Si N= 6 2.10±0.02 0.02 ±0.02 N=6 12.7 ± 1.4
Version 2, dry

Adhesion is good in both assembly versions, the thermal

parameters of the dry version are characterized by a low
thermal resistance of 0.02 K/W. In Fig. 6, it can be seen that
when chips of 3 mm x 3 mm are assembled onto the dried
paste, the number of voids is significantly lower than that of
the 10 mm x 10 mm thermal test specimens (compare with
Figs. 4 and 5).

Fig. 4. Version no. 1, assembly on wet paste. Thermal test specimen sample
size 10 mm x 10 mm.

Fig. 6. Adhesion test sample, chip size 3 mm x 3 mm

IV. SUMMARY
When analyzing the suitability of a variety of technologies
Fig. 5. Verison no 2, assembly on pre-dryied paste
for assembling high-power devices, one should be guided by
the criteria for evaluating thermal and mechanical properties,
The suitability of the Au/Au interface made with sintering as well as their suitability for high-temperature (> 250 °C)
technology in versions no 1 and no 2 for operation at elevated operation. Environmental limitations associated with the use
temperatures was additionally investigated by assembling SiC of Pb in solders (Pb5Sn solders) and the high price of Au
diodes in a metal TO-257 package. It was verified that the suggest that potential solutions should be sought among two
Au/Au interface does not lose its thermal and adhesive technologies: Ag paste sintering and Sn layer-based SLID
properties at the SiC diode junction temperature of 225 °C. technology. Both of these technologies have thermal and
Evaluation of the applicability of the Au/Au interface for mechanical performance comparable or better than that of
operation at high temperatures will be continued. soldering technology. Their important advantage is the ability
to operate at temperatures exceeding 250 °C.
B. Interface Au/Si
A final series of TIM AT2M62 paste sintering tests
The Au/Si interface can be found in solutions when GaN- showed that it is suitable to use Ag paste sintering with a
on-Si is attached to a substrate with Au metallization. In such version of paste pre-drying at 60 °C for 10 min. After that,
a solution, there is no need to deposit the bottom metallization place a WBG chip with Au metallization on the heated paste
on Si. In this way, the fabrication time is reduced, and the cost and continue sintering at 175 °C for 30 min without pressure.
of assembling GaN-on-Si chips is lowered. Therefore, the The formed Au/Au or Au/Si interface is characterized by good
thermal parameters and adhesion of the Au/Si interface were adhesion, as low thermal resistance as possible and the
investigated. The test results are summarized in Tab.4. interface is suitable for junction temperatures up to 225 °C.
ACKNOWLEDGMENT
Authors acknowledge support and conscientiousness of
Amepox Microelectronic, Poland in preparation of Ag pastes.

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